27 Memory Management and Protection Units (MMU, MPU)
Example 2. An APP_CPU process, with a PID of 4, needs to read external flash address 0x44_048C via virtual
address 0x4044_048C. The MMU is not in special mode.
• According to Table 27-9, virtual address 0x4044_048C resides in the 0x4'th page of V Addr
• According to Table 27-11, the MMU entry for V Addr
• The modified MMU entry is 2560 + 0x4 = 2564.
• Address 0x44_048C resides in the 0x44'th 64 KB-sized page.
• MMU entry 2564 needs to be set to 0x44 and marked as valid by setting the 8'th bit to 0. Thus, 0x044 is
written to MMU entry 2564.
External RAM
Processes running on PRO_CPU and APP_CPU can read and write External SRAM via the Cache at virtual address
range V Addr
, which is 0x3F80_0000 ~ 0x3FBF_FFFF. As with the flash MMU, the address space and the
RAM
physical memory are divided into pages. For the External RAM MMU, the page size is 32 KB and the MMU is
able to map 256 physical pages into the virtual address space, allowing for 32 KB * 256 = 8 MB of physical
external RAM to be mapped.
The mapping of virtual pages into this memory range depends on the mode this MMU is in: Low-High mode,
Even-Odd mode, or Normal mode. In all cases, the DPORT_PRO_DRAM_HL bit and DPORT_PRO_DRAM_SPLIT
bit in register DPORT_PRO_CACHE_CTRL_REG, the DPORT_APP_DRAM_HL bit and DPORT_APP_DRAM_SPLIT
bit in register DPORT_APP_CACHE_CTRL_REG determine the virtual address mode for External SRAM. For details,
please see Table 27-14. If a different mapping for the PRO_CPU and APP_CPU is required, the Normal Mode
should be selected, as it is the only mode that can provide this. If it is allowable for the PRO_CPU and the
APP_CPU to share the same mapping, using either High-Low or Even-Odd mode can give a speed gain when
both CPUs access memory frequently.
In case the APP_CPU cache is disabled, which renders the region of 0x4007_8000 to 0x4007_FFFF usable
as normal internal RAM, the usability of the various cache modes changes. Normal mode will allow PRO_CPU
access to external RAM to keep functioning, but the APP_CPU will be unable to access the external RAM.
High-Low mode allows both CPUs to use external RAM, but only for the 2 MB virtual memory addresses from
0x3F80_0000 to 0x3F9F_FFFF. It is not advised to use Even-Odd mode with the APP_CPU cache region dis-
abled.
Mode
Low-High
Even-Odd
Normal
In normal mode, the virtual-to-physical page mapping can be different for both CPUs. Page mappings for
PRO_CPU are set using the MMU entries for
figured using the MMU entries for
fully used, allowing a maximum of 8 MB of memory to be mapped; 4 MB into PRO_CPU address space and a
possibly different 4 MB into the APP_CPU address space, as can be seen in Table 27-15.
Espressif Systems
Table 27-14. Virtual Address Mode for External SRAM
DPORT_PRO_DRAM_HL
DPORT_APP_DRAM_HL
1
0
0
L
V Addr
R
. In this mode, all 128 pages of both
V Addr
RAM
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for PID 4 for the APP_CPU starts at 2560.
2
DPORT_PRO_DRAM_SPLIT
DPORT_APP_DRAM_SPLIT
0
1
0
, and page mappings for the APP_CPU can be con-
RAM
621
.
2
L
R
V Addr and
V Addr are
ESP32 TRM (Version 5.2)
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