Espressif ESP32 Technical Reference Manual page 77

4 IO_MUX and GPIO Matrix (GPIO, IO_MUX)
31
If you want to output clock for
CLK_OUT1, then set PIN_CTRL[3:0] = 0x0;
CLK_OUT2, then set PIN_CTRL[3:0] = 0x0 and PIN_CTRL[7:4] = 0x0;
CLK_OUT3, then set PIN_CTRL[3:0] = 0x0 and PIN_CTRL[11:8] = 0x0.
If you want to output clock for
CLK_OUT1, then set PIN_CTRL[3:0] = 0xF;
CLK_OUT2, then set PIN_CTRL[3:0] = 0xF and PIN_CTRL[7:4] = 0x0;
CLK_OUT3, then set PIN_CTRL[3:0] = 0xF and PIN_CTRL[11:8] = 0x0.
If you want to output clock for APLL to
CLK_OUT1, then set PIN_CTRL[3:0] = 0x6;
CLK_OUT2, then set PIN_CTRL[3:0] = 0x6 and PIN_CTRL[7:4] = 0x6;
CLK_OUT3, then set PIN_CTRL[3:0] = 0x6 and PIN_CTRL[11:8] = 0x6. (R/W)
Note:
• Only the above mentioned combinations of clock source (i.e. I2S0/1_CLK, APLL clock) and clock output pins
(i.e. CLK_OUT1 ~ 3) are possible.
• The CLK_OUT1 ~ 3 can be found in the
Espressif Systems
Register 4.33. IO_MUX_PIN_CTRL (0x00)
0x0
I2S0 (I2S0_CLK) to:
I2S1 (I2S1_CLK) to:
IO_MUX Pad Summary.
77
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12 11 8 7
0x0 0x0
ESP32 TRM (Version 5.2)
4 3 0
0x0
Reset