Espressif ESP32 Technical Reference Manual page 590

23 SHA Accelerator (SHA)
SHA-1 uses SHA_SHA1_START_REG, SHA_SHA1_CONTINUE_REG, SHA_SHA1_LOAD_REG and
SHA_SHA1_BUSY_REG.
SHA-256 uses SHA_SHA256_START_REG, SHA_SHA256_CONTINUE_REG,
SHA_SHA256_LOAD_REG and SHA_SHA256_BUSY_REG. SHA-384 uses SHA_SHA384_START_REG,
SHA_SHA384_CONTINUE_REG, SHA_SHA384_LOAD_REG and SHA_SHA384_BUSY_REG.
SHA-512 uses SHA_SHA512_START_REG, SHA_SHA512_CONTINUE_REG, SHA_SHA512_LOAD_REG
and SHA_SHA512_BUSY_REG. The following steps describe the operation in a detailed manner.
1. Feed the accelerator with the first message block:
(a) Use the first message block to initialize SHA_TEXT_n_REG.
(b) Write 1 to SHA_X_START_REG.
(c) Wait for SHA_X_BUSY_REG to read 0, indicating that the operation is completed.
2. Similarly, feed the accelerator with subsequent message blocks:
(a) Initialize SHA_TEXT_n_REG using the subsequent message block.
(b) Write 1 to SHA_X_CONTINUE_REG.
(c) Wait for SHA_X_BUSY_REG to read 0, indicating that the operation is completed.
3. Get message digest:
(a) Write 1 to SHA_X_LOAD_REG.
(b) Wait for SHA_X_BUSY_REG to read 0, indicating that operation is completed.
(c) Read message digest from SHA_TEXT_n_REG.
23.3.4 Speed
The SHA Accelerator requires 60 to 100 clock cycles to process a message block and 8 to 20 clock cycles to
calculate the final digest.
23.4 Register Summary
Name
Encrypted/decrypted data registers
SHA_TEXT_0_REG
SHA_TEXT_1_REG
SHA_TEXT_2_REG
SHA_TEXT_3_REG
SHA_TEXT_4_REG
SHA_TEXT_5_REG
SHA_TEXT_6_REG
SHA_TEXT_7_REG
SHA_TEXT_8_REG
SHA_TEXT_9_REG
SHA_TEXT_10_REG
SHA_TEXT_11_REG
SHA_TEXT_12_REG
Espressif Systems
Description
SHA encrypted/decrypted data register 0
SHA encrypted/decrypted data register 1
SHA encrypted/decrypted data register 2
SHA encrypted/decrypted data register 3
SHA encrypted/decrypted data register 4
SHA encrypted/decrypted data register 5
SHA encrypted/decrypted data register 6
SHA encrypted/decrypted data register 7
SHA encrypted/decrypted data register 8
SHA encrypted/decrypted data register 9
SHA encrypted/decrypted data register 10
SHA encrypted/decrypted data register 11
SHA encrypted/decrypted data register 12
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Address Access
0x3FF03000 R/W
0x3FF03004 R/W
0x3FF03008 R/W
0x3FF0300C R/W
0x3FF03010 R/W
0x3FF03014 R/W
0x3FF03018 R/W
0x3FF0301C R/W
0x3FF03020 R/W
0x3FF03024 R/W
0x3FF03028 R/W
0x3FF0302C R/W
0x3FF03030 R/W
ESP32 TRM (Version 5.2)