Espressif ESP32 Technical Reference Manual page 137

7 SPI Controller (SPI)
Name
SPI_DMA_RSTATUS_REG
SPI_DMA_TSTATUS_REG
DMA interrupt registers
SPI_DMA_INT_RAW_REG
SPI_DMA_INT_ST_REG
SPI_DMA_INT_ENA_REG
SPI_DMA_INT_CLR_REG
Espressif Systems
Description
DMA memory read
status
DMA memory write
status
Raw interrupt status
Masked interrupt sta-
tus
Interrupt enable bits
Interrupt clear bits
137
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SPI0 SPI1 SPI2
3FF43148 3FF42148 3FF64148 3FF65148 RO
3FF4314C 3FF4214C 3FF6414C 3FF6514C RO
3FF43114 3FF42114 3FF64114
3FF43118 3FF42118 3FF64118
3FF43110 3FF42110 3FF64110
3FF4311C 3FF4211C 3FF6411C
ESP32 TRM (Version 5.2)
SPI3 Acc
3FF65114 RO
3FF65118 RO
3FF65110 R/W
3FF6511C R/W