Espressif ESP32 Technical Reference Manual page 248

10 Ethernet Media Access Controller (MAC)
Bits Name
[31:0] Buffer 1 Address Pointer
Bits Name
[31:0] Next Descriptor Address
Bits Name
[31:28] Reserved
[27:26] Reserved
[25] Reserved
[24] Reserved
[23:21] Reserved
[20:18] Reserved
[17] Reserved
[16] Reserved
[15] Reserved
[14] Reserved
[13] Reserved
[12] Reserved
[11:8] Message Type
[7] IPv6 Packet Received
Espressif Systems
Table 10-11. Receive Descriptor 2 (RDES2)
Description
These bits indicate the physical address of Buffer 1.
Table 10-12. Receive Descriptor 3 (RDES3)
Description
This address contains the pointer to the physical memory where
the Next Descriptor is present.
Table 10-13. Receive Descriptor 4 (RDES4)
Description
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
These bits are encoded to give the type of the message received.
• 3'b0000: Reserved
• 3'b0001: SYNC (all clock types)
• 3'b0010: Follow_Up (all clock types)
• 3'b0011: Delay_Req (all clock types)
• 3'b0100: Delay_Resp (all clock types)
• 3'b0101: Pdelay_Req (in peer-to-peer transparent clock)
• 3'b0110: Pdelay_Resp (in peer-to-peer transparent clock)
• 3'b0111: Pdelay_Resp_Follow_Up (in peer-to-peer transpar-
ent clock)
• 3'b1000: Announce
• 3'b1001: Management
• 3'b1010: Signaling
• 3'b1011-3'b1110: Reserved
• 3'b1111: Reserved
When set, this bit indicates that the received packet is an IPv6
packet. This bit is updated only when Bit[10] (IPC) of Register
(MAC Configuration Register) is set.
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ESP32 TRM (Version 5.2)