Espressif ESP32 Technical Reference Manual page 700

31 Low-Power Management (RTC_CNTL)
WAKEUP_ENA
0x100
0x200
0x400
1
All wakeup sources can also be configured as the causes to reject sleep, ex-
cept UART.
2
EXT0 can only wake up the chip in light-sleep/deep-sleep mode.
If RTC_CNTL_EXT_WAKEUP0_LV
is low-level triggered. Users can set
one of the RTC PADs to be the wake-up source.
3
EXT1 is especially designed to wake up the chip from any sleep mode, and it
also supports multiple pads' combinations.
First,
with the bitmap of PADS selected as a wake-up source.
RTC_CNTL_EXT_WAKEUP1_LV
level, it can trigger a wake-up. However, if
it needs all selected PADs to be at low-voltage level to trigger a wake-up.
Note that the EXT1 hold time should be longer than three RTC slow
clock cycles,
RTC_CNTL_EXT_WAKEUP1_STATUS.
4
In Deep-sleep mode, only RTC GPIOs (not DIGITAL GPIOs) can work as wakeup
source.
5
Wake-up is triggered by receiving any SDIO command.
6
To wake up the chip with a Wi-Fi or BT source, the power mode switches be-
tween the Active, Modem- and Light-sleep modes. The CPU, Wi-Fi, Bluetooth,
and radio are woken up at predetermined intervals to keep Wi-Fi/BT connec-
tions active.
7
Wake-up is triggered when the number or positive edges of RxD signal is greater
than or equal to (UART_ACTIVE_THRESHOLD+2). Note that the RxD signal can-
not be input through GPIO Matrix but only through IO_MUX.
31.3.11 Reject Sleep
ESP32 implements a hardware mechanism that equips the chip with the ability to reject to sleep, which prevents
the chip from going to sleep unexpectedly when some peripherals are still working but not detected by the CPU,
thus guaranteeing the proper functioning of the peripherals.
Espressif Systems
Table 31-2. Wake-up Source
Wake-up Source
2
0x1 EXT0
3
0x2 EXT1
4
0x4 GPIO
0x8 RTC timer
5
0x10 SDIO
6
0x20 Wi-Fi
7
0x40 UART0
7
0x80 UART1
TOUCH
ULP co-processor
6
BT
RTC_CNTL_EXT_WAKEUP1_SEL[17:0]
is 1, as long as one of the PADs is at high-voltage
otherwise the signal status will not be captured in
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1
Light-sleep Deep-sleep
Y Y
Y Y
Y Y
Y Y
Y -
Y -
Y -
Y -
Y Y
Y Y
Y -
is 1, it is pad high-level triggered; otherwise, it
RTCIO_EXT_WAKEUP0_SEL[4:0]
should
RTC_CNTL_EXT_WAKEUP1_LV
700
Hibernation
-
Y
-
Y
-
-
-
-
-
-
-
to select
be configured
Then, if
is 0,
ESP32 TRM (Version 5.2)