Espressif ESP32 Technical Reference Manual page 714

31 Low-Power Management (RTC_CNTL)
31
0 0 0 0 0 0 0
RTC_CNTL_MAIN_TIMER_INT_ST The masked interrupt status bit for the
RTC_CNTL_MAIN_TIMER_INT interrupt. (RO)
RTC_CNTL_BROWN_OUT_INT_ST The masked interrupt status bit for the
RTC_CNTL_BROWN_OUT_INT interrupt. (RO)
RTC_CNTL_TOUCH_INT_ST The masked interrupt status bit for the RTC_CNTL_TOUCH_INT inter-
rupt. (RO)
RTC_CNTL_SAR_INT_ST The masked interrupt status bit for the RTC_CNTL_SAR_INT interrupt.
(RO)
RTC_CNTL_TIME_VALID_INT_ST The masked interrupt status bit for the
RTC_CNTL_TIME_VALID_INT interrupt. (RO)
RTC_CNTL_WDT_INT_ST The masked interrupt status bit for the RTC_CNTL_WDT_INT interrupt.
(RO)
RTC_CNTL_SDIO_IDLE_INT_ST The masked interrupt status bit for the
RTC_CNTL_SDIO_IDLE_INT interrupt. (RO)
RTC_CNTL_SLP_REJECT_INT_ST The masked interrupt status bit for the
RTC_CNTL_SLP_REJECT_INT interrupt. (RO)
RTC_CNTL_SLP_WAKEUP_INT_ST The masked interrupt status bit for the
RTC_CNTL_SLP_WAKEUP_INT interrupt. (RO)
Espressif Systems
Register 31.16. RTC_CNTL_INT_ST_REG (0x0044)
0 0 0 0 0 0 0 0
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9
0 0 0 0 0 0 0 0
714
8 7 6 5 4 3 2 1
0 0 0 0 0 0 0 0
ESP32 TRM (Version 5.2)
0
0
Reset