Espressif ESP32 Technical Reference Manual page 64

4 IO_MUX and GPIO Matrix (GPIO, IO_MUX)
Name
GPIO_STATUS1_REG
GPIO_STATUS1_W1TS_REG
GPIO_STATUS1_W1TC_REG
GPIO_ACPU_INT_REG
GPIO_ACPU_NMI_INT_REG
GPIO_PCPU_INT_REG
GPIO_PCPU_NMI_INT_REG
GPIO_ACPU_INT1_REG
GPIO_ACPU_NMI_INT1_REG
GPIO_PCPU_INT1_REG
GPIO_PCPU_NMI_INT1_REG
GPIO_PIN0_REG
GPIO_PIN1_REG
GPIO_PIN2_REG
...
GPIO_PIN38_REG
GPIO_PIN39_REG
GPIO_FUNC0_IN_SEL_CFG_REG
GPIO_FUNC1_IN_SEL_CFG_REG
...
GPIO_FUNC254_IN_SEL_CFG_REG
GPIO_FUNC255_IN_SEL_CFG_REG
GPIO_FUNC0_OUT_SEL_CFG_REG
GPIO_FUNC1_OUT_SEL_CFG_REG
...
GPIO_FUNC38_OUT_SEL_CFG_REG
GPIO_FUNC39_OUT_SEL_CFG_REG
4.12.2 IO MUX Register Summary
Name
IO_MUX_PIN_CTRL
IO_MUX_GPIO36_REG
IO_MUX_GPIO37_REG
IO_MUX_GPIO38_REG
IO_MUX_GPIO39_REG
IO_MUX_GPIO34_REG
IO_MUX_GPIO35_REG
IO_MUX_GPIO32_REG
IO_MUX_GPIO33_REG
Espressif Systems
Description
GPIO 32-39 interrupt status register1
GPIO 32-39 interrupt status bit set register
GPIO 32-39 interrupt status bit clear register
GPIO 0-31 APP_CPU interrupt status
GPIO 0-31 APP_CPU non-maskable interrupt sta-
tus
GPIO 0-31 PRO_CPU interrupt status
GPIO 0-31 PRO_CPU non-maskable interrupt sta-
tus
GPIO 32-39 APP_CPU interrupt status
GPIO 32-39 APP_CPU non-maskable interrupt
status
GPIO 32-39 PRO_CPU interrupt status
GPIO 32-39 PRO_CPU non-maskable interrupt
status
Configuration for GPIO pin 0
Configuration for GPIO pin 1
Configuration for GPIO pin 2
...
Configuration for GPIO pin 38
Configuration for GPIO pin 39
Peripheral function 0 input selection register
Peripheral function 1 input selection register
...
Peripheral function 254 input selection register
Peripheral function 255 input selection register
Peripheral output selection for GPIO 0
Peripheral output selection for GPIO 1
...
Peripheral output selection for GPIO 38
Peripheral output selection for GPIO 39
Description
Clock output configuration register
Configuration register for pad GPIO36
Configuration register for pad GPIO37
Configuration register for pad GPIO38
Configuration register for pad GPIO39
Configuration register for pad GPIO34
Configuration register for pad GPIO35
Configuration register for pad GPIO32
Configuration register for pad GPIO33
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Address Access
0x3FF44050 R/W
0x3FF44054 WO
0x3FF44058 WO
0x3FF44060 RO
0x3FF44064 RO
0x3FF44068 RO
0x3FF4406C RO
0x3FF44074 RO
0x3FF44078 RO
0x3FF4407C RO
0x3FF44080 RO
0x3FF44088 R/W
0x3FF4408C R/W
0x3FF44090 R/W
0x3FF44120 R/W
0x3FF44124 R/W
0x3FF44130 R/W
0x3FF44134 R/W
0x3FF44528 R/W
0x3FF4452C R/W
0x3FF44530 R/W
0x3FF44534 R/W
0x3FF445C8 R/W
0x3FF445CC R/W
Address Access
0x3FF49000 R/W
0x3FF49004 R/W
0x3FF49008 R/W
0x3FF4900C R/W
0x3FF49010 R/W
0x3FF49014 R/W
0x3FF49018 R/W
0x3FF4901C R/W
0x3FF49020 R/W
ESP32 TRM (Version 5.2)