Espressif ESP32 Technical Reference Manual page 670

30 ULP Coprocessor (ULP)
The instruction loads the lower 16-bit half-word from memory with address Rsrc + offset into the destination
register Rdst:
Note:
• This instruction can only access 32-bit memory words.
• In any case, it is always the lower 16 bits of a memory word that are loaded. Differently put, it is not
possible to read the upper 16 bits.
• The "Mem" loaded is the RTC_SLOW_MEM memory. Address 0, as seen by the ULP coprocessor,
corresponds to address 0x50000000, as seen by the main CPUs.
30.4.4 JUMP – Jump to an Absolute Address
31 28 27
4'd8 3'b0
Operand Description - see Figure
Rdst Register R[0-3], address to jump to
ImmAddr 11-bit address, expressed in 32-bit words
Sel Selects the address to jump to:
0 - jump to the address contained in ImmAddr
1 - jump to the address contained in Rdst
Type Jump type:
0 - make an unconditional jump
1 - jump only if the last ALU operation has set the zero flag
2 - jump only if the last ALU operation has set the overflow flag
Description
The instruction prompts a jump to the specified address. The jump can be either unconditional or based on
the ALU flag.
Note:
All jump addresses are expressed in 32-bit words.
30.4.5 JUMPR – Jump to a Relative Offset (Conditional upon R0)
31 28 27
4'd8 3'b1
Espressif Systems
Rdst[15:0] = Mem[ Rsrc + Offset ][15:0]
25 24 22 21
Type
Figure 30-8. Instruction Type — JUMP
30-8
25 24 17
Step
Figure 30-9. Instruction Type — JUMPR
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12
ImmAddr
15
16
Threshold
670
2 1 0
Rdst
0
ESP32 TRM (Version 5.2)