Espressif ESP32 Technical Reference Manual page 318

12 I2S Controller (I2S)
Generally, both the I2S_RX_FIFO_MOD_FORCE_EN bit and I2S_TX_FIFO_MOD_FORCE_EN bits of register I2S_
FIFO_CONF_REG should be set to 1. I2S_TX_DATA_NUM[5:0] bit and I2S_RX_DATA_NUM[5:0] are used to
control the length of the data that have been sent, received and buffered. Hardware inspects the received-data
length RX_LEN and the transmitted-data length TX_LEN. Both the received and the transmitted data are buffered
in the FIFO method.
When RX_LEN is greater than I2S_RX_DATA_NUM[5:0], the received data, which is buffered in FIFO, has reached
the set threshold and needs to be read out to prevent an overflow. When TX_LEN is less than I2S_TX_DATA_NUM[5:0],
the transmitted data, which is buffered in FIFO, has not reached the set threshold and software can continue
feeding data into FIFO.
12.4.4 Sending Data
The ESP32 I2S module carries out a data-transmit operation in three stages:
• Read data from internal storage and transfer it to FIFO
• Read data to be sent from FIFO
• Clock out data serially, or in parallel, as configured by the user
Tx FIFO mode0
Tx FIFO mode1
At the first stage, there are two modes for data to be sent and written into FIFO. In Tx FIFO mode0, the Tx data-
to-be-sent are written into FIFO according to the time order. In Tx FIFO mode1, the data-to-be-sent are divided
into 16 high- and 16 low-order bits. Then, both the 16 high- and 16 low-order bits are recomposed and written
into FIFO. The details are shown in Figure
of 16 high-order bits of D
'
'
= {D
D [31 : 16], 16 h0}, D
n
n
At the second stage, the system reads data that will be sent from FIFO, according to the relevant regis-
ter configuration. The mode in which the system reads data from FIFO is relevant to the configuration of
Espressif Systems
Figure 12-6. Tx FIFO Data Mode
Table 12-2. Register Configuration
I2S_TX_FIFO_MOD[2:0]
0
2
3
1
12-6 with the corresponding registers listed in Table 12-2. D
''
and 16 zeros. D consists of 16 low-order bits of D
n
n
''
'
= {D
[15 : 0], 16 h0}.
n
n
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Description
16-bit dual channel data
32-bit dual channel data
32-bit single channel data
16-bit single channel data
318
'
consists
n
and 16 zeros. That is to say,
n
ESP32 TRM (Version 5.2)