Espressif ESP32 Technical Reference Manual page 414

15 Remote Control Peripheral (RMT)
31 30 29 28 27 26 25
0 0 0 0 0 0 0
RMT_CHn_TX_THR_EVENT_INT_RAW The
RMT_CHn_TX_THR_EVENT_INT
RMT_CHn_ERR_INT_RAW The raw interrupt status bit for the RMT_CHn_ERR_INT interrupt. (RO)
RMT_CHn_RX_END_INT_RAW The raw interrupt status bit for the
(RO)
RMT_CHn_TX_END_INT_RAW The raw interrupt status bit for the
(RO)
31 30 29 28 27 26 25
0 0 0 0 0 0 0
RMT_CHn_TX_THR_EVENT_INT_ST The
RMT_CHn_TX_THR_EVENT_INT
RMT_CHn_ERR_INT_ST The masked interrupt status bit for the RMT_CHn_ERR_INT interrupt. (RO)
RMT_CHn_RX_END_INT_ST The masked interrupt status bit for the
rupt. (RO)
RMT_CHn_TX_END_INT_ST The masked interrupt status bit for the
rupt. (RO)
Espressif Systems
Register 15.3. RMT_INT_RAW_REG (0x00A0)
24 23 22 21 20 19 18 17
0 0 0 0 0 0 0 0
interrupt. (RO)
Register 15.4. RMT_INT_ST_REG (0x00A4)
24 23 22 21 20 19 18 17
0 0 0 0 0 0 0 0
interrupt. (RO)
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16 15 14 13 12 11 10 9
0 0 0 0 0 0 0 0
raw interrupt
RMT_CHn_RX_END_INT
RMT_CHn_TX_END_INT
16 15 14 13 12 11 10 9
0 0 0 0 0 0 0 0
masked interrupt
414
8 7 6 5 4 3 2 1
0 0 0 0 0 0 0 0
status bit for
interrupt.
interrupt.
8 7 6 5 4 3 2 1
0 0 0 0 0 0 0 0
status bit for
RMT_CHn_RX_END_INT
RMT_CHn_TX_END_INT
ESP32 TRM (Version 5.2)
0
0
Reset
the
0
0
Reset
the
inter-
inter-