Espressif ESP32 Technical Reference Manual page 72
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Also See for ESP32:
- At instruction set (58 pages) ,
- Manual (22 pages) ,
- User manual (20 pages)
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4 IO_MUX and GPIO Matrix (GPIO, IO_MUX)
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GPIO_STATUS1_INT_W1TS GPIO32-39 interrupt status set register. For every bit that is 1 in the value
written here, the corresponding bit in GPIO_STATUS1_INT will be set. (WO)
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GPIO_STATUS1_INT_W1TC GPIO32-39 interrupt status clear register. For every bit that is 1 in the
value written here, the corresponding bit in GPIO_STATUS1_INT will be cleared. (WO)
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GPIO_ACPU_INT_REG GPIO0-31 APP CPU interrupt status. (RO)
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GPIO_ACPU_NMI_INT_REG GPIO0-31 APP CPU non-maskable interrupt status. (RO)
Espressif Systems
Register 4.20. GPIO_STATUS1_W1TS_REG (0x0054)
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Register 4.21. GPIO_STATUS1_W1TC_REG (0x0058)
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Register 4.22. GPIO_ACPU_INT_REG (0x0060)
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Register 4.23. GPIO_ACPU_NMI_INT_REG (0x0064)
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ESP32 TRM (Version 5.2)
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Reset
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Reset
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Reset
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Reset
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