Espressif ESP32 Technical Reference Manual page 385

13 UART Controller (UART)
31 30 29 28 27
0 0 0 0 0 0 0
UHCI_OUTLINK_PARK 1: the outlink descriptor's FSM is in idle state; 0: the outlink descriptor's FSM
is working. (RO)
UHCI_OUTLINK_RESTART Set this bit to restart the outlink descriptor from the last address. (R/W)
UHCI_OUTLINK_START Set this bit to start a new outlink descriptor. (R/W)
UHCI_OUTLINK_STOP Set this bit to stop dealing with the outlink descriptor. (R/W)
UHCI_OUTLINK_ADDR This register stores the least significant 20 bits of the first outlink descriptor's
address. (R/W)
31 30 29 28 27
0 0 0 0 0 0 0
UHCI_INLINK_PARK 1: the inlink descriptor's FSM is in idle state; 0: the inlink descriptor's FSM is
working. (RO)
UHCI_INLINK_RESTART Set this bit to mount new inlink descriptors. (R/W)
UHCI_INLINK_START Set this bit to start dealing with the inlink descriptors. (R/W)
UHCI_INLINK_STOP Set this bit to stop dealing with the inlink descriptors. (R/W)
UHCI_INLINK_ADDR This register stores the 20 least significant bits of the first inlink descriptor's
address. (R/W)
Espressif Systems
Register 13.37. UHCI_DMA_OUT_LINK_REG (0x24)
20 19
0 0 0 0 0
Register 13.38. UHCI_DMA_IN_LINK_REG (0x28)
20 19
0 0 0 0 0
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0x000000
0x000000
385
0
Reset
0
Reset
ESP32 TRM (Version 5.2)