Espressif ESP32 Technical Reference Manual page 530

20 eFuse Controller
been assigned to each of the three parameters, as shown in Table 20-5, some of the 256 register bits are useless
in the 3/4 coding and the Repeat coding scheme. In the None coding scheme, the corresponding register bit
of each bit of BLOCKN [255 : 0] is used. In the 3/4 coding scheme, only the corresponding register bits of
BLOCKN [191 : 0] are useful. In Repeat coding scheme, only the corresponding bits of BLOCKN [127 : 0] are
useful. In different coding schemes, the values of useless register bits read by software are invalid. The values
of useful register bits read by software are the system parameters BLOCK1, BLOCK2, and BLOCK3 themselves
instead of their values after being encoded.
System parameter
Name
efuse_wr_disable
efuse_rd_disable
flash_crypt_cnt
uart_download_dis
WIFI_MAC_Address
disable_app_cpu
disable_bt
pkg_version
disable_cache
SPI_pad_config_hd
BLK3_part_reserve
CK8M Frequency
XPD_SDIO_REG
SDIO_TIEH
sdio_force
SPI_pad_config_clk
SPI_pad_config_q
SPI_pad_config_d
SPI_pad_config_cs0
vol_level_hp_inv
dig_vol_l6
flash_crypt_config
coding_scheme
console_debug_disable
abstract_done_0
abstract_done_1
JTAG_disable
download_dis_encrypt
download_dis_decrypt
download_dis_cache
key_status
Espressif Systems
Table 20-5. Software Read Registers
Bit Width Bit
16 [15:0]
4 [3:0]
7 [6:0]
1 [0]
[31:0]
56
[55:32]
1 [0]
1 [0]
4 [3:0]
1 [0]
5 [4:0]
1 [0]
8 [7:0]
1 [0]
1 [0]
1 [0]
5 [4:0]
5 [4:0]
5 [4:0]
5 [4:0]
2 [1:0]
4 [3:0]
4 [3:0]
2 [1:0]
1 [0]
1 [0]
1 [0]
1 [0]
1 [0]
1 [0]
1 [0]
1 [0]
530
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Register
Name
EFUSE_BLK0_RDATA0_REG
EFUSE_BLK0_RDATA1_REG
EFUSE_BLK0_RDATA2_REG
EFUSE_BLK0_RDATA3_REG
EFUSE_BLK0_RDATA4_REG
EFUSE_BLK0_RDATA5_REG
EFUSE_BLK0_RDATA6_REG
ESP32 TRM (Version 5.2)
Bit
[15:0]
[19:16]
[26:20]
[27]
[31:0]
[23:0]
[0]
[1]
[2], [11:9]
[3]
[8:4]
[14]
[7:0]
[14]
[15]
[16]
[4:0]
[9:5]
[14:10]
[19:15]
[23:22]
[27:24]
[31:28]
[1:0]
[2]
[4]
[5]
[6]
[7]
[8]
[9]
[10]