Espressif ESP32 Technical Reference Manual page 665

30 ULP Coprocessor (ULP)
30 ULP Coprocessor (ULP)
30.1 Introduction
The ULP coprocessor is an ultra-low-power processor that remains powered on during the Deep-sleep mode
of the main SoC. Hence, the developer can store in the RTC memory a program for the ULP coprocessor to
access peripheral devices, internal sensors and RTC registers during deep sleep. This is useful for designing
applications where the CPU needs to be woken up by an external event, or timer, or a combination of these,
while maintaining minimal power consumption.
30.2 Features
• Contains up to 8 KB of SRAM for instructions and data
• Uses RTC_FAST_CLK, which is 8 MHz
• Works both in normal and deep sleep
• Is able to wake up the digital core or send an interrupt to the CPU
• Can access peripheral devices, internal sensors and RTC registers
• Contains four 16-bit general-purpose registers (R0, R1, R2, R3) for manipulating data and accessing
memory
• Includes one 8-bit Stage_cnt register which can be manipulated by ALU and used in JUMP instructions
Espressif Systems
APB Bus
RTC Memory
I2C CTRL
TSENS CTRL
Coprocessor
SAR CTRL
Figure 30-1. ULP Coprocessor Diagram
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RTC CNTL REG
RTC IO REG
Arbiter
SARADC REG
RTC I2C REG
ULP
RTC Timer
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ESP32 RTC
ESP32 TRM (Version 5.2)