Espressif ESP32 Technical Reference Manual page 672

30 ULP Coprocessor (ULP)
Note:
After executing this instruction, the ULP coprocessor timer gets started.
30.4.8 WAKE – Wake up the Chip
31 28 27
4'd9 3'b0
Description
This instruction sends an interrupt from the ULP coprocessor to the RTC controller.
• If the SoC is in Deep-sleep mode, and the ULP wake-up is enabled, the above-mentioned interrupt will
wake up the SoC.
• If the SoC is not in Deep-sleep mode, and the ULP interrupt bit (RTC_CNTL_ULP_CP_INT_ENA) is set in
register RTC_CNTL_INT_ENA_REG, a RTC interrupt will be triggered.
30.4.9 Sleep – Set the ULP Timer's Wake-up Period
31 28 27
4'd9 3'b1
Operand Description - see Figure
sleep_reg Selects one of five
of the ULP coprocessor
Description
The instruction selects which one of the
used by the ULP timer as the wake-up period. By default, the value of SENS_ULP_CP_SLEEP_CYC0_REG is
used.
30.4.10 WAIT – Wait for a Number of Cycles
31 28
4'd4
Operand Description - see Figure
Cycles the number of cycles to wait between sleeps
Description
The instruction will delay the ULP coprocessor from getting into sleep for a certain number of Cycles.
30.4.11 ADC – Take Measurement with ADC
31 28
4'd5
Espressif Systems
25
Figure 30-12. Instruction Type — WAKE
25
Figure 30-13. Instruction Type — SLEEP
30-13
SENS_ULP_CP_SLEEP_CYCn_REG
SENS_ULP_CP_SLEEP_CYCn_REG
Figure 30-14. Instruction Type — WAIT
30-14
Figure 30-15. Instruction Type — ADC
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(n: 0-4) as the wake-up period
(n: 0-4) register values is to be
15
Cycles
672
0
3 0
sleep_reg
0
6 5 2 1 0
Sar Mux
Rdst
ESP32 TRM (Version 5.2)