Espressif ESP32 Technical Reference Manual page 195

9 SD/MMC Host Controller
Pin
cclk_out
ccmd
cdata
card_detect_n
card_write_prt
9.4 Functional Description
9.4.1 SD/MMC Host Controller Architecture
The SD/MMC host controller consists of two main functional blocks, as shown in Figure 9-3:
• Bus Interface Unit (BIU): It provides APB interfaces for registers, data read and write operation by FIFO and
DMA.
• Card Interface Unit (CIU): It handles external memory card interface protocols. It also provides clock
control.
Espressif Systems
Figure 9-2. SD/MMC Controller External Interface Signals
Table 9-1. SD/MMC Signal Description
Direction
Output
Duplex
Duplex
Input
Input
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Description
Clock signals for slave device
Duplex command/response lines
Duplex data read/write lines
Card detection input line
Card write protection status input
195 ESP32 TRM (Version 5.2)