4 IO_MUX and GPIO Matrix (GPIO, IO_MUX)
31
30
29
28
27
26
2
0
0
0
RTCIO_PAD_PDAC1_DRV Select the drive strength of the pad. (R/W)
RTCIO_PAD_PDAC1_HOLD Set to 1 to hold the output value on the pad; set to 0 for normal opera-
tion. (R/W)
RTCIO_PAD_PDAC1_RDE 1: Pull-down on pad enabled; 0: Pull-down disabled. (R/W)
RTCIO_PAD_PDAC1_RUE 1: Pull-up on pad enabled; 0: Pull-up disabled. (R/W)
RTCIO_PAD_PDAC1_DAC PAD DAC1 output value. (R/W)
RTCIO_PAD_PDAC1_XPD_DAC Power on DAC1. Usually, PDAC1 needs to be tristated if we power on
the DAC, i.e. IE=0, OE=0, RDE=0, RUE=0. (R/W)
RTCIO_PAD_PDAC1_MUX_SEL 0: route pad to the digital IO_MUX; (R/W)
1: route to the RTC block.
RTCIO_PAD_PDAC1_FUN_SEL the functional selection signal of the pad. (R/W)
RTCIO_PAD_PDAC1_SLP_SEL Sleep mode selection signal of the pad. Set this bit to 1 to put the
pad to sleep. (R/W)
RTCIO_PAD_PDAC1_SLP_IE Input enable of the pad in sleep mode. 1: enabled; 0: disabled. (R/W)
RTCIO_PAD_PDAC1_SLP_OE Output enable of the pad. 1: enabled ; 0: disabled. (R/W)
RTCIO_PAD_PDAC1_FUN_IE Input enable of the pad. 1: enabled it; 0: disabled. (R/W)
RTCIO_PAD_PDAC1_DAC_XPD_FORCE Power on DAC1. Usually, we need to tristate PDAC1 if we
power on the DAC, i.e. IE=0, OE=0, RDE=0, RUE=0. (R/W)
Espressif Systems
Register 4.49. RTCIO_PAD_DAC1_REG (0x0084)
19
18
17
16
15
0
0
0
0
86
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14
13
12
11
10
9
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Reset
ESP32 TRM (Version 5.2)
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