Espressif ESP32 Technical Reference Manual page 346

12 I2S Controller (I2S)
31
0 0 0
I2S_RX_FIFO_RESET_BACK This bit is used to confirm if the Rx FIFO reset is done. 1: reset is not
ready; 0: reset is ready. (RO)
I2S_TX_FIFO_RESET_BACK This bit is used to confirm if the Tx FIFO reset is done. 1: reset is not
ready; 0: reset is ready. (RO)
I2S_TX_IDLE The status bit of the transmitter. 1: the transmitter is idle; 0: the transmitter is busy.
(RO)
Espressif Systems
Register 12.35. I2S_STATE_REG (0x00bc)
0 0 0 0
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0 0 0
346
3 2 1 0
0 0 0 0 1 Reset
ESP32 TRM (Version 5.2)