Chapter 1 Overview
1.6 Internal State after Reset is Cleared
The contents of each register after a reset is cleared are as follows.
• Data registers (R0, R1, R2, and R3): 0000
• Address registers (A0 and A1): 0000
• Frame base register (FB): 0000
• Interrupt table register (INTB): 00000
• User stack pointer (USP): 0000
• Interrupt stack pointer (ISP): 0000
• Static base register (SB): 0000
• Flag register (FLG): 0000
Rev.2.00 Oct 17, 2005
REJ09B0001-0200
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1.6 Internal State after Reset is Cleared
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