Internal State Immediately After Reset - Renesas 7200 Series User Manual

FUNCTIONAL DESCRIPTION
2.15 Reset

2.15.2 Internal state immediately after reset

Figures 2.15.2 to 2.15.4 show the internal state immediately after reset.
SFR Area (addresses C0
Address
C0
16
C1
16
C2
16
C3
16
C4
16
C5
16
C6
16
C7
16
C8
16
C9
16
CA
16
CB
16
CC
16
CD
16
CE
16
CF
16
D0
16
D1
16
D2
16
D3
16
D4
16
D5
16
D6
16
D7
16
D8
16
D9
16
DA
16
DB
16
DC
16
DD
16
DE
16
DF
16
Fig. 2.15.2 Internal state immediately after reset (1)
2-96
Register
Port P0 (P0)
Port P0 direction register (D0)
Port P1 (P1)
Port P1 direction register (D1)
Port P2 (P2)
Port P2 direction register (D2)
Port P3 (P3)
Port P3 direction register (D3)
Port P5 (P5)
Port P5 direction register (D5)
Port P3 output mode control register (P3S)
DA-H register (DA-H)
DA-L register (DA-L)
PWM0 register (PWM0)
PWM1 register (PWM1)
PWM2 register (PWM2)
PWM3 register (PWM3)
PWM4 register (PWM4)
PWM output control register 1 (PW)
PWM output control register 2 (PN)
2
I C data shift register (S0)
2
I C address register (S0D)
2
I C status register (S1)
2
I C control register (S1D)
2
I C clock control register (S2)
Serial I/O mode register (SM)
Serial I/O register (SIO)
7220 Group User's Manual
to DF )
16 16
State immediately after reset
<
: "0" immediately after reset
0
: "1" immediately after reset
1
: Indeterminate immediately
?
after reset
State immediately after reset
b7
0 0 0
0 0
?
?
0 0
0 0 0
>
b0
?
00
16
?
00
16
?
00
16
? ? ? ? ?
00
16
?
?
?
? ? ? ?
00
16
?
00
16
?
? ? ? ? ?
?
?
?
?
?
00
16
00
16
?
00
16
1 0 0 0 ?
00
16
00
16
00
16
?
00
16
00
16