Table 47. Boosten And Anaswvdd Set/Reset - ST STM32G4 Series Reference Manual

RM0440
> 2.4 V
< 2.4 V
9.2.3 SYSCFG external interrupt configuration register 1
(SYSCFG_EXTICR1)
Address offset: 0x08
Reset value: 0x0000 0000
31 30 29
Res Res Res
15 14 13
EXTI3[3:0]
rw rw rw
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:12 EXTI3[3:0]: EXTI 3 configuration bits
Bits 11:8 EXTI2[3:0]: EXTI 2 configuration bits

Table 47. BOOSTEN and ANASWVDD set/reset

VDD
-
28 27 26 25
Res Res Res Res
12 11 10 9
EXTI2[3:0]
rw rw rw rw
These bits are written by software to select the source input for the EXTI3
external interrupt.
0000: PA[3] pin
0001: PB[3] pin
0010: PC[3] pin
0011: PD[3] pin
0100: PE[3] pin
0101: PF[3] pin
0110: PG[3] pin
These bits are written by software to select the source input for the EXTI2
external interrupt.
0000: PA[2] pin
0001: PB[2] pin
0010: PC[2] pin
0011: PD[2] pin
0100: PE[2] pin
0101: PF[2] pin
0110: PG[2] pin
System configuration controller (SYSCFG)
VDDA BOOSTEN
> 2.4 V
< 2.4 V
< 2.4 V
24 23 22
Res Res Res
8 7 6
EXTI1[3:0]
rw rw rw
RM0440 Rev 1
ANASWVDD
0
0
1
21 20 19 18
Res Res Res Res
5 4 3 2
EXTI0[3:0]
rw rw rw rw
0
1
0
17 16
Res Res
1 0
rw rw
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