ST STM32G4 Series Reference Manual page 160

Embedded Flash memory (FLASH) for category 2 devices
31 30 29
PCROP
Res. Res.
_RDP
rw
15 14 13
Res.
rw rw
Bits 30:15 Reserved, must be kept at reset value.
WRP1 Area A address option bytes
Flash memory address: 0x1FFF 7818
ST production value: 0xFF00 FFFF
31 30 29
Res. Res. Res.
15 14 13
Res. Res. Res.
Bits 31:23 Reserved, must be kept at reset value.
Bits 22:16 WRP1A_END: WRP first area "A" end offset
160/2083
28 27 26 25
Res. Res. Res. Res.
12 11 10 9
rw rw rw rw
Bit 31 PCROP_RDP: PCROP area preserved when RDP level decreased
This bit is set only. It is reset after a full mass erase due to a change of RDP
from Level 1 to Level 0.
0: PCROP area is not erased when the RDP level is decreased from Level 1 to
Level 0.
1: PCROP area is erased when the RDP level is decreased from Level 1 to
Level 0 (full mass erase).
Bits 14:0 PCROP1_END: Bank 1 PCROP area end offset
PCROP1_END contains the last double-word of the PCROP area.
28 27 26 25
Res. Res. Res. Res.
12 11 10 9
Res. Res. Res. Res.
WRP1A_END contains the last page of WRP first area.
Bits 15:7 Reserved, must be kept at reset value.
Bits 6:0 WRP1A_STRT: WRP first area "A" start offset
WRP1A_STRT contains the first page of WRP first area.
24 23 22
Res. Res. Res.
8 7 6
PCROP1_END[14:0]
rw rw rw
24 23 22
Res. Res.
rw
8 7 6
Res. Res.
rw
RM0440 Rev 1
21 20 19 18
Res. Res. Res. Res.
5 4 3 2
rw rw rw rw
21 20 19 18
WRP1A_END[6:0]
rw rw rw rw
5 4 3 2
WRP1A_STRT[6:0]
rw rw rw rw
RM0440
17 16
Res. Res.
1 0
rw rw
17 16
rw rw
1 0
rw rw