Table 82. Dmamux: Assignment Of Synchronization Inputs To Resources; Table 81. Dmamux: Assignment Of Trigger Inputs To Resources - ST STM32G4 Series Reference Manual

RM0440
Table 80. DMAMUX: assignment of multiplexer inputs to resources
DMA
request Resource
MUX input
36 ADC2
37 ADC3
38 ADC4
39 ADC5
40 QUADSPI
41 DAC2_CH1
42 TIM1_CH1
43 TIM1_CH2
1. See Table 2: Product specific features
Trigger input
10
11
12
13
14
15

Table 82. DMAMUX: assignment of synchronization inputs to resources

Sync. input
DMA
request
MUX input
79
80
81
82
83
84
85
86
for available resources.

Table 81. DMAMUX: assignment of trigger inputs to resources

Resource
0 EXTI LINE0
1 EXTI LINE1
2 EXTI LINE2
3 EXTI LINE3
4 EXTI LINE4
5 EXTI LINE5
6 EXTI LINE6
7 EXTI LINE7
8 EXTI LINE8
9 EXTI LINE9
EXTI LINE10
EXTI LINE11
EXTI LINE12
EXTI LINE13
EXTI LINE14
EXTI LINE15
Resource
0 EXTI LINE0
1 EXTI LINE1
2 EXTI LINE2
3 EXTI LINE3
4 EXTI LINE4
DMA request multiplexer (DMAMUX)
DMA
Resource request
MUX input
TIM15_UP 122
TIM15_TRIG 123
TIM15_COM 124
TIM16_CH1 125
TIM16_UP 126
TIM17_CH1 127
TIM17_UP -
TIM20_CH1 -
Trigger input
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
Sync. input
16
17
18
19
20
RM0440 Rev 1
(1)
(continued)
Resource
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
-
-
Resource
DMAMUX1_ch0_event
DMAMUX1_ch1_event
DMAMUX1_ch2_event
DMAMUX1_ch3_event
LPTIM1_OUT
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Resource
DMAMUX1_ch0_event
DMAMUX1_ch1_event
DMAMUX1_ch2_event
DMAMUX1_ch3_event
LPTIM1_OUT
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