ST STM32G4 Series Reference Manual page 208

Power control (PWR)
I/O states in Standby mode
In the Standby mode, the I/Os can be configured either with a pull-up (refer to PWR_PUCRx
registers (x=A,B,C,D,E,F,G)), or with a pull-down (refer to PWR_PDCRx registers
(x=A,B,C,D,E,F,G)), or can be kept in analog state.
The RTC outputs on PC13 are functional in Standby mode. PC14 and PC15 used for LSE
are also functional. 5 wakeup pins (WKUPx, x=1,2...5) and the 3 RTC tampers are available.
Entering Standby mode
The Standby mode is entered according
SLEEPDEEP bit in the Cortex
Refer to
In Standby mode, the following features can be selected by programming individual control
bits:
• Independent watchdog (IWDG): the IWDG is started by writing to its Key register or by
hardware option. Once started it cannot be stopped except by a reset. See
Section 41.3: IWDG functional description
(IWDG).
• real-time clock (RTC): this is configured by the RTCEN bit in the Backup domain
control register (RCC_BDCR)
•
Internal RC oscillator (LSI): this is configured by the LSION bit in the Control/status
register (RCC_CSR).
•
External 32.768 kHz oscillator (LSE): this is configured by the LSEON bit in the Backup
domain control register (RCC_BDCR)
Exiting Standby mode
The Standby mode is exit according
flag in the
mode. All registers are reset after wakeup from Standby except for
(PWR_CR3).
Refer to
208/2083
®
Table 37: Standby mode
Power control register 3 (PWR_CR3)
Table 37: Standby mode
Section : Entering low power
-M4 with FPU System Control register is set.
for details on how to enter Standby mode.
in Section 41: Independent watchdog
Section : Entering low power
indicates that the MCU was in Standby
for more details on how to exit Standby mode.
RM0440 Rev 1
RM0440
mode, when the
mode. The SBF status
Power control register 3