ST STM32G4 Series Reference Manual page 267

RM0440
Bit 18 DAC3EN: DAC3 clock enable
Set and cleared by software.
0: DAC3 clock disabled
1: DAC3 clock enabled
Bit 17 DAC2EN: DAC2 clock enable
Set and cleared by software.
0: DAC2 clock disabled
1: DAC2 clock enabled
Bit 16 DAC1EN: DAC1 clock enable
Set and cleared by software.
0: DAC1 clock disabled
1: DAC1 clock enabled
Bit 15 Reserved, must be kept at reset value.
Bit 14 ADC345EN: ADC345 clock enable
Set and cleared by software
0: ADC345 clock disabled
1: ADC345 clock enabled
Bit 13 ADC12EN: ADC12 clock enable
Set and cleared by software.
0: ADC12 clock disabled
1: ADC12 clock enabled
Bits 12:7 Reserved, must be kept at reset value.
Bit 6 GPIOGEN: IO port G clock enable
Set and cleared by software.
0: IO port G clock disabled
1: IO port G clock enabled
Bit 5 GPIOFEN: IO port F clock enable
Set and cleared by software.
0: IO port F clock disabled
1: IO port F clock enabled
Bit 4 GPIOEEN: IO port E clock enable
Set and cleared by software.
0: IO port E clock disabled
1: IO port E clock enabled
Bit 3 GPIODEN: IO port D clock enable
Set and cleared by software.
0: IO port D clock disabled
1: IO port D clock enabled
RM0440 Rev 1
Reset and clock control (RCC)
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