Securable Memory Area; Table 25. Wrp Protection - ST STM32G4 Series Reference Manual

Advanced arm-based 32-bit mcus
Hide thumbs Also See for STM32G4 Series:
Table of Contents

Advertisement

Embedded Flash memory (FLASH) for category 2 devices
For example, to protect by WRP from the address 0x0806 2800 (included) to the address
0x0807 07FF (included):
if boot in flash is selected, FLASH_WRP1AR register must be programmed with:
WRP1B_STRT and WRP1B_END in FLASH_WRP1BR can be used instead (area "B"
in Flash memory).
When WRP is active, it cannot be erased or programmed. Consequently, a software mass
erase cannot be performed if one area is write-protected.
If an erase/program operation to a write-protected part of the Flash memory is attempted,
the write protection error flag (WRPERR) is set in the FLASH_SR register. This flag is also
set for any write access to:
Note:
When the memory read protection level is selected (RDP level = 1), it is not possible to
program or erase Flash memory if the CPU debug features are connected (JTAG or single
wire) or boot code is being executed from RAM or System flash, even if WRP is not
activated.
Note:
To validate the WRP options, the option bytes must be reloaded through the OBL_LAUNCH
bit in Flash control register.
WRP registers values
(x=1 y= A/B)
WRPxy_STRT =
WRPxy_END
WRPxy_STRT >
WRPxy_END
WRPxy_STRT <
WRPxy_END
4.5.4

Securable memory area

The Securable memory area defines an area of code which can be executed only once at
boot, and never again unless a new reset occurs.
The main purpose of the Securable memory area is to protect a specific part of Flash
memory against undesired access. This allows implementing software security services
such as secure key storage or safe boot. Securable memory area is located in the Main
Flash memory. It is dedicated to executing trusted code. When not secured, the Securable
memory behaves like the remainder of Main Flash memory. When secured (the
SEC_PROT1 bit of the FLASH_CR register set), any attempt to program or erase in a
secure memory area generates a write protection error (WRPERR flag is set) and any
attempt to read from it generates a read error (RDERR flag is set).
168/2083
WRP1A_STRT = 0x62.
WRP1A_END = 0x70.
OTP area
part of the Flash memory that can never be written like the ICP
PCROP area.
Page WRPxy is protected.
No WRP area.
The pages from

Table 25. WRP protection

WRP protection area
WRPxy_STRT
RM0440 Rev 1
WRPxy_END
to
are protected.
RM0440

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the STM32G4 Series and is the answer not in the manual?

Questions and answers

Subscribe to Our Youtube Channel

Table of Contents

Save PDF