Table 51. Interconnect 12; Table 52. Interconnect 13; Table 53. Interconnect 14 - ST STM32G4 Series Reference Manual

Peripherals interconnect matrix
The burst mode controller counter can be clocked by general purpose timers as well as
shown in the
HRTIM Burst mode trigger event/ clock signal
hrtim_bm_trg
hrtim_bm_ck1
hrtim_bm_ck2
hrtim_bm_ck3
hrtim_upd_en1
hrtim_upd_en2
hrtim_upd_en3
The HRTIM can be synchronized by external sources as shown in the
HRTIM synchronization signals
hrtim_in_sync2
hrtim_in_sync3
Some of the TIMx timers are linked together internally for timer synchronization or chaining.
When one timer is configured in Master Mode, it can reset, start, stop or clock the counter of
another timer configured in Slave Mode.
A description of the feature is provided in:
The modes of synchronization are detailed in:
• Section 27.3.30: Timer synchronization
(TIM1/TIM8/TIM20)
•
Section 28.4.23: Timer synchronization
(TIM2/TIM3/TIM4/TIM5)
•
Section 29.4.26: Timer synchronization (TIM15)
342/2083
Table 51.
HRTIM update enable signal

Table 51. Interconnect 12

HRTIM Burst mode trigger event/ clock signal
tim7_trgo
tim16_oc
tim17_oc
tim7_trgo'

Table 52. Interconnect 13

HRTIM update enable assignment
tim16_oc
tim17_oc
tim6_oc

Table 53. Interconnect 14

HRTIM synchronization signal assignment
tim1_trgo
HRTIM_SCIN
Section 27.3.30: Timer
for advanced-control timers
for general-purpose timers
for general-purpose timer (TIM15)
RM0440 Rev 1
RM0440
assignment
Table 53.
synchronization.