Table 70. Interconnect 10; Table 71. Interconnect 11 - ST STM32G4 Series Reference Manual

RM0440
HRTIM external
event input signal
hrtim_eev1[4:1]
hrtim_eev2[4:1]
hrtim_eev3[4:1]
hrtim_eev4[4:1]
hrtim_eev5[4:1]
hrtim_eev6[4:1]
hrtim_eev7[4:1]
hrtim_eev8[4:1]
hrtim_eev9[4:1]
hrtim_eev10[4:1]
Fault channel
hrtim_flt1[4:1] HRTIM_FLT1
hrtim_flt2[4:1] HRTIM_FLT2
hrtim_flt3[4:1] HRTIM_FLT3
hrtim_flt4[4:1] HRTIM_FLT4
hrtim_flt5[4:1] HRTIM_FLT5
hrtim_flt6[4:1] HRTIM_FLT6
Active power mode
Run, Sleep, Low-power run, Low-power sleep.

Table 70. Interconnect 10

HRTIM external event signal assignment
EExSRC[1:0]=0
EExSRC[1:0]=1
(from GPIO pin)
HRTIM_EEV1
HRTIM_EEV2
HRTIM_EEV3
HRTIM_EEV4
HRTIM_EEV5
HRTIM_EEV6
HRTIM_EEV7
HRTIM_EEV8
HRTIM_EEV9
HRTIM_EEV10

Table 71. Interconnect 11

External Input
FLTxSRC[1:0] = 00
EExSRC[1:0]=2
comp2_out
comp4_out
comp6_out
comp1_out
comp3_out
comp2_out
comp4_out
comp6_out
comp5_out
comp7_out
On-chip source
FLTxSRC[1:0] = 01 FLTxSRC[1:0] = 10
Comparator output EEV1_muxout
Comparator output EEV2_muxout
Comparator output EEV3_muxout
Comparator output EEV4_muxout
Comparator output EEV5_muxout
Comparator output EEV6_muxout
RM0440 Rev 1
Peripherals interconnect matrix
EExSRC[1:0]=3
tim1_trgo adc1_AWD1
tim2_trgo adc1_AWD2
tim3_trgo adc1_AWD3
comp5_out adc2_AWD1
comp7_out adc2_AWD2
comp1_out adc2_AWD3
tim7_trgo adc3_AWD1
comp3_out adc4_AWD1
tim15_trgo comp4_out
tim6_trgo adc5_AWD1
External Input On-chip source
FLTxSRC[1:0] = 11
N/A
N/A
N/A
N/A
N/A
N/A
357/2083
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