Table 68. Interconnect 8; Table 69. Interconnect 9 - ST STM32G4 Series Reference Manual

Peripherals interconnect matrix
The timer break input features two channels:
•
A break channel which gathers both application fault (from input pins and built-in
comparators) and system-level fault (clock failure, parity error, ...).
•
A break2 channel which only includes application faults (from input pins and built-in
comparators).
Refer to
TIM1 break
(tim1_bk)
TIM1_BKIN
pin
comp1_out
comp2_out
Timer break
comp3_out
signal sources
comp4_out
comp5_out
comp6_out
comp7_out
Timer break2
signal source
356/2083
Table 68, Table 69 and

Table 68. Interconnect 8

TIM8 break
(tim8_bk)
TIM8_BKIN
pin
comp1_out
comp2_out
comp3_out
comp4_out
comp5_out
comp6_out
comp7_out
TIM1 break2
(tim1_bk2)
TIM1_BKIN2 pin
comp1_out
comp2_out
comp3_out
comp4_out
comp5_out
comp6_out
comp7_out
Table 72.
Timer break signals assignment
TIM15 break TIM16 break
(tim15_bk) (tim16_bk)
TIM15_BKIN TIM16_BKIN
pin
comp1_out comp1_out
comp2_out comp2_out
comp3_out comp3_out
comp4_out comp4_out
comp5_out comp5_out
comp6_out comp6_out
comp7_out comp7_out

Table 69. Interconnect 9

Timer break2 signals assignment
TIM8 break2
(tim8_bk2)
TIM8_BKIN2 pin
comp1_out
comp2_out
comp3_out
comp4_out
comp5_out
comp6_out
comp7_out
RM0440 Rev 1
TIM17 break
(tim17_bk)
TIM17_BKIN
pin pin
comp1_out
comp2_out
comp3_out
comp4_out
comp5_out
comp6_out
comp7_out
TIM20 break2
(tim20_bk2)
TIM20_BKIN2 pin
RM0440
TIM20 break
(tim20_bk)
TIM20_BKIN
pin
comp1_out
comp2_out
comp3_out
comp4_out
comp5_out
comp6_out
comp7_out
comp1_out
comp2_out
comp3_out
comp4_out
comp5_out
comp6_out
comp7_out