Table 80. Dmamux: Assignment Of Multiplexer Inputs To Resources - ST STM32G4 Series Reference Manual

DMA request multiplexer (DMAMUX)

Table 80. DMAMUX: assignment of multiplexer inputs to resources

DMA
request Resource
MUX input
1 DMAMUX_Req G0
2 DMAMUX_Req G1
3 DMAMUX_Req G2
4 DMAMUX_Req G3
5 ADC1
6 DAC1_CH1
7 DAC1_CH2
8 TIM6_UP
9 TIM7_UP
10 SPI1_RX
11 SPI1_TX
12 SPI2_RX
13 SPI2_TX
14 SPI3_RX
15 SPI3_TX
16 I2C1_RX
17 I2C1_TX
18 I2C2_RX
19 I2C2_TX
20 I2C3_RX
21 I2C3_TX
22 I2C4_RX
23 I2C4_TX
24 USART1_RX
25 USART1_TX
26 USART2_RX
27 USART2_TX
28 USART3_RX
29 USART3_TX
30 UART4_RX
31 UART4_TX
32 UART5_RX
33 UART5_TX
34 LPUART1_RX
35 LPUART1_TX
384/2083
DMA
request Resource
MUX input
44 TIM1_CH3
45 TIM1_CH4
46 TIM1_UP
47 TIM1_TRIG
48 TIM1_COM
49 TIM8_CH1
50 TIM8_CH2
51 TIM8_CH3
52 TIM8_CH4
53 TIM8_UP
54 TIM8_TRIG
55 TIM8_COM
56 TIM2_CH1
57 TIM2_CH2
58 TIM2_CH3
59 TIM2_CH4
60 TIM2_UP
61 TIM3_CH1
62 TIM3_CH2
63 TIM3_CH3
64 TIM3_CH4
65 TIM3_UP
66 TIM3_TRIG
67 TIM4_CH1
68 TIM4_CH2
69 TIM4_CH3
70 TIM4_CH4
71 TIM4_UP
72 TIM5_CH1
73 TIM5_CH2
74 TIM5_CH3
75 TIM5_CH4
76 TIM5_UP
77 TIM5_TRIG
78 TIM15_CH1
RM0440 Rev 1
DMA
request
MUX input
87 TIM20_CH2
88 TIM20_CH3
89 TIM20_CH4
90
91
92
93 TIM20_TRIG
94 TIM20_COM
95 HRTIM_MASTER (hrtim_dma1)
96 HRTIM_TIMA (hrtim_dma2)
97 HRTIM_TIMB (hrtim_dma3)
98 HRTIM_TIMC (hrtim_dma4)
99 HRTIM_TIMD (hrtim_dma5)
100 HRTIM_TIME (hrtim_dma6
101 HRTIM_TIMF (hrtim_dma7)
102 DAC3_CH1
103 DAC3_CH2
104 DAC4_CH1
105 DAC4_CH2
106
107
108
109
110 FMAC_Read
111 FMAC_Write
112 Cordic_Read
113 Cordic_Write
114 UCPD1_RX
115 UCPD1_TX
116
117
118
119
120
121
RM0440
(1)
Resource
TIM20_UP
AES_IN
AES_OUT
SPI4_RX
SPI4_TX
SAI1_A
SAI1_B
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved