ST STM32G4 Series Reference Manual page 233

RM0440
LSI or LSE, or in external clock mode.
•
The RTC clock which is derived (selected by software) from one of the three following
sources:
–
–
–
The functionality in Stop mode (including wakeup) is supported only when the clock is
LSI or LSE.
• The IWDG clock which is always the LSI clock.
•
The UCPD1 clock, which is derived from HSI16 clock.
• The FDCAN1 clock, which is derived (selected by software) from one of the two
following sources:
–
–
–
The RCC feeds the Cortex
(HCLK) divided by 8. The SysTick can work either with this clock or directly with the Cortex
clock (HCLK), configurable in the SysTick Control and Status Register.
FCLK acts as Cortex
®
Cortex -M4 programming manual (PM0214).
LSE clock
LSI clock
HSE clock divided by 32
HSE clock
PLL "Q" clock
PCLK clock
®
System Timer (SysTick) external clock with the AHB clock
®
-M4 with FPU free-running clock. For more details refer to the
RM0440 Rev 1
Reset and clock control (RCC)
®
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