ST STM32G4 Series Reference Manual page 345

RM0440
10.3.3 From ADC (ADCx) to timer (TIMx, HRTIM)
See please
ADCs Analog watchdogs are connected to TIM1/8/20 for digital power applications (cycle-
bycycle current regulation with ADC).
A description of the ADC analog watchdog setting is provided in:
window watchdog (AWD1EN, JAWD1EN, AWD1SGL, AWD1CH, AWD2CH, AWD3CH,
AWD_HTx, AWD_LTx,
Trigger settings on the timer are provided in:
Triggering signals
The output (from ADC) is on signals ADCn_AWDx_OUT and the input (to timer) on signal
TIMx_ETR (external trigger) or hrtim_eevx[4:1].
Active power mode
Run, Sleep, Low-power run, Low-power sleep.
10.3.4 From timer (TIMx, HRTIM) and EXTI to DAC (DACx)
DAC trigger
selection
(TSELx[3:0],
STRSTTRIG
Update/
SELx[3:0])
reset
0 sw
1 tim8_trgo
2 tim7_trgo
3 tim15_trgo tim15_trgo tim15_trgo tim15_trgo tim15_trgo tim15_trgo tim15_trgo tim15_trgo
4 tim2_trgo
5 tim4_trgo
6 exti9
7 tim6_trgo
8 tim3_trgo
hrtim_dac_
9
reset_trg1
hrtim_dac_
10
reset_trg2
hrtim_dac_
11
reset_trg3
Table 62: Interconnect 2
AWDx).
Table 55. Interconnect 20
DAC triggers signals assignment
DAC1
Update/
Inc
reset
- sw
tim8_trgo tim8_trgo
tim7_trgo tim7_trgo
tim2_trgo tim2_trgo
tim4_trgo tim4_trgo
exti10 exti9
tim6_trgo tim6_trgo
tim3_trgo tim3_trgo
hrtim_step hrtim_dac_
_trig1 reset_trg1
hrtim_step hrtim_dac_
_trig2 reset_trg2
hrtim_step hrtim_dac_
_trig3 reset_trg3
and Table 70.: Interconnect 10
Section 27.3.6: External trigger
DAC2
Update
Inc
/reset
- sw
tim8_trgo tim1_trgo
tim7_trgo tim7_trgo
tim2_trgo tim2_trgo
tim4_trgo tim4_trgo
exti10 exti9
tim6_trgo tim6_trgo
tim3_trgo tim3_trgo
hrtim_dac
hrtim_step
_reset_trg
_trig1
1
hrtim_dac
hrtim_step
_reset_trg
_trig2
2
hrtim_dac
hrtim_step
_reset_trg
_trig3
3
RM0440 Rev 1
Peripherals interconnect matrix
Section 20.4.28: Analog
DAC3
Update/
Inc
reset
- sw
tim1_trgo tim8_trgo
tim7_trgo tim7_trgo
tim2_trgo tim2_trgo
tim4_trgo tim4_trgo
exti10 exti9
tim6_trgo tim6_trgo
tim3_trgo tim3_trgo
hrtim_dac
hrtim_step
_reset_trg
_trig1
1
hrtim_stept hrtim_rst_
rig_2 _trig_2
hrtim_dac
hrtim_step
_reset_trg
_trig3
3
input.
DAC4
Inc
-
tim8_trgo
tim7_trgo
tim2_trgo
tim4_trgo
exti10
tim6_trgo
tim3_trgo
hrtim_step
_trig1
hrtim_step
_trig2
hrtim_step
_trig3
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