ST STM32G4 Series Reference Manual page 293

RM0440
Offset Register
RCC_
APB2RSTR
0x40
Reset value
RCC_AHB1
ENR
0x48
Reset value
RCC_AHB2
ENR
0x4C
Reset value
RCC_AHB3
ENR
0x50
Reset value
RCC_
APB1ENR1
0x58
0 0
Reset value
RCC_
APB1ENR2
0x5C
Reset value
RCC_
APB2ENR
0x60
Reset value
RCC_
AHB1SMENR
0x68
Reset value
Table 41. RCC register map and reset values (continued)
0
0 0
0 0 0 0 0 0 0 0 0
0
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0
0 0
0 0 0 0 0 0 0 0 0 0
RM0440 Rev 1
Reset and clock control (RCC)
0 1 0 0 0 0 0
0 0 0 0 0 0 0
0
0 1 0 0 0 0 0 0 0
0
1 1 1 1 1 1 1 1
0
0
0 0
0
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