Addresses - ST STM32G4 Series Reference Manual

All the memory map areas that are not allocated to on-chip memories and peripherals are
considered "Reserved". For the detailed mapping of available memory and register areas,
refer to the following table.
The following table gives the boundary addresses of the peripherals available in the
devices.
Table 3. STM32G4 Series memory map and peripheral register boundary
Bus Boundary address
0xA000 1400 - 0xAFFF FFFF 262 MB Reserved
0xA000 1000 - 0xA000 13FF 1 KB
-
0xA000 0400 - 0xA000 0FFF 3 KB
0xA000 0000 - 0xA000 03FF 1 KB
0x5006 0C00 - 0x5FFF FFFF 256MB
0x5006 0800 - 0x5006 0BFF
0x5006 0400 - 0x5006 07FF
0x5006 0000 - 0x5006 03FF
0x5000 1800 - 0x5005 FFFF
0x5000 1400 - 0x5000 17FF
0x5000 1000 - 0x5000 13FF
0x5000 0C00 - 0x5000 0FFF 1 KB
0x5000 0800 - 0x5000 0BFF
AHB2 0x5000 0400 - 0x5000 07FF
0x5000 0000 - 0x5000 03FF
0x4800 1C00 - 0x4FFF FFFF 127 MB Reserved
0x4800 1800 - 0x4800 1BFF
0x4800 1400 - 0x4800 17FF
0x4800 1000 - 0x4800 13FF
0x4800 0C00 - 0x4800 0FFF 1 KB
0x4800 0800 - 0x4800 0BFF
0x4800 0400 - 0x4800 07FF
0x4800 0000 - 0x4800 03FF
80/2083
(1)

addresses

Size
Peripheral
(bytes)
QUADSPI control
Registers
Reserved
FMC
Reserved
1 KB RNG
1 KB Reserved
1 KB AES
377 KB Reserved
1 KB DAC4
1 KB DAC3
DAC2
1 KB DAC1
ADC3 - ADC4 -
1 KB
ADC5
1 KB ADC1 - ADC2
1 KB GPIOG
1 KB GPIOF
1 KB GPIOE
GPIOD
1 KB GPIOC
1 KB GPIOB
1 KB GPIOA
RM0440 Rev 1
Peripheral register map
-
Section 19.5.14: QUADSPI register map
-
Section 18.7: FMC register map
-
Section 25.7.4: RNG register map
-
Section 33.7.18: AES register map
-
Section 21.7.24: DAC register map
Section 21.7.24: DAC register map
Section 21.7.24: DAC register map
Section 21.7.24: DAC register map
Section 20.7.4: ADC register map
Section 20.7.4: ADC register map
-
Section 8.4.12: GPIO register map
Section 8.4.12: GPIO register map
Section 8.4.12: GPIO register map
Section 8.4.12: GPIO register map
Section 8.4.12: GPIO register map
Section 8.4.12: GPIO register map
Section 8.4.12: GPIO register map
RM0440