Table 6. Memory Mapping Versus Boot Mode/Physical Remap - ST STM32G4 Series Reference Manual

RM0440
• FSMC bank 1 (NOR/PSRAM 1 and 2)
• QUADSPI memory

Table 6. Memory mapping versus boot mode/physical remap

Addresses
0x2000 0000 - 0x2002 3FFF
0x1FFF 7000 - 0x1FFF FFFF
0x1000 8000 - 0x1FFE FFFF
0x1000 0000 - 0x1000 7FFF
0x0808 0000 - 0x0FFF FFFF
0x0800 0000 - 0x0807 FFFF
0x0400 0000 - 0x07FF FFFF
0x0010 0000 - 0x03FF FFFF
0x0000 0000 - 0x0007 FFFF
(2) (3)
1. Reserved memory area highlighted in gray in the table.
2. When the FSMC is remapped at address 0x0000 0000, only the first two regions of bank 1 memory controller (bank 1
NOR/PSRAM 1 and NOR/PSRAM 2) can be remapped. When the FSMC is remapped at address 0x0000 0000, only
128 MB are remapped. In remap mode, the CPU can access the external memory via ICode bus instead of system bus,
which boosts up the performance.
3. Even when aliased in the boot memory space, the related memory is still accessible at its original memory space.
Embedded boot loader
The embedded boot loader is located in the system memory, programmed by ST during
production. Refer to AN2606 STM32 microcontroller system memory boot mode.
Boot/remap in Boot/remap in
main Flash embedded
memory SRAM 1
SRAM1 SRAM1
System System
memory/OTP/ memory/OTP/
Options bytes Options bytes
Reserved Reserved
CCM SRAM CCM SRAM
Reserved Reserved
Flash memory Flash memory
Reserved Reserved
Reserved Reserved
SRAM1
Flash Aliased
Aliased
RM0440 Rev 1
Boot/remap in
Remap in
system
FSMC
memory
SRAM1 SRAM1
System System
memory/OTP/ memory/OTP/
Options bytes Options bytes
Reserved Reserved
CCM SRAM CCM SRAM
Reserved Reserved
Flash memory Flash memory
FSMC bank 1
NOR/
Reserved PSRAM 2
(128 MB)
Aliased
FSMC bank 1
NOR/
Reserved PSRAM 1
(128 MB)
Aliased
FSMC bank 1
System
NOR/
memory
PSRAM 1
(28 KB)
(128 MB)
Aliased
Aliased)
(1)
Remap in
QUADSPI
SRAM1
System
memory/OTP/
Options bytes
Reserved
CCM SRAM
Reserved
Flash memory
QUADSPI
bank (128 MB)
Aliased
QUADSPI
bank (128 MB)
Aliased
QUADSPI
Aliased)
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