ST STM32G4 Series Reference Manual page 28

Contents
28.4.21 Timer input XOR function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1248
28.4.22 Timers and external trigger synchronization . . . . . . . . . . . . . . . . . . . 1248
28.4.23 Timer synchronization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1252
28.4.24 DMA burst mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1256
28.4.25 TIM2/TIM3/TIM4/TIM5 DMA requests . . . . . . . . . . . . . . . . . . . . . . . . 1257
28.4.26 Debug mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1258
28.4.27 TIM2/TIM3/TIM4/TIM5 low-power modes . . . . . . . . . . . . . . . . . . . . . 1258
28.4.28 TIM2/TIM3/TIM4/TIM5 interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1258
28.5 TIM2/TIM3/TIM4/TIM5 registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1260
28.5.1
28.5.2
28.5.3
28.5.4
28.5.5
28.5.6
28.5.7
28.5.8
28.5.9
28.5.10 TIMx capture/compare mode register 2 [alternate]
28.5.11 TIMx capture/compare enable register (TIMx_CCER)(x = 2 to 5) . . . 1277
28.5.12 TIMx counter (TIMx_CNT)(x = 3, 4) . . . . . . . . . . . . . . . . . . . . . . . . . . 1279
28.5.13 TIMx counter (TIMx_CNT)(x = 2, 5) . . . . . . . . . . . . . . . . . . . . . . . . . . 1279
28.5.14 TIMx prescaler (TIMx_PSC)(x = 2 to 5) . . . . . . . . . . . . . . . . . . . . . . . 1280
28.5.15 TIMx auto-reload register (TIMx_ARR)(x = 3, 4) . . . . . . . . . . . . . . . . 1280
28.5.16 TIMx auto-reload register (TIMx_ARR)(x = 2, 5) . . . . . . . . . . . . . . . . 1281
28.5.17 TIMx capture/compare register 1 (TIMx_CCR1)(x = 3, 4) . . . . . . . . . 1281
28.5.18 TIMx capture/compare register 1 (TIMx_CCR1)(x = 2, 5) . . . . . . . . . 1282
28.5.19 TIMx capture/compare register 2 (TIMx_CCR2)(x = 3, 4) . . . . . . . . . 1283
28.5.20 TIMx capture/compare register 2 (TIMx_CCR2)(x = 2, 5) . . . . . . . . . 1284
28.5.21 TIMx capture/compare register 3 (TIMx_CCR3)(x = 3, 4) . . . . . . . . . 1285
28.5.22 TIMx capture/compare register 3 (TIMx_CCR3)(x = 2, 5) . . . . . . . . . 1286
28.5.23 TIMx capture/compare register 4 (TIMx_CCR4)(x = 3, 4) . . . . . . . . . 1287
28.5.24 TIMx capture/compare register 4 (TIMx_CCR4)(x = 2, 5) . . . . . . . . . 1288
28.5.25 TIMx timer encoder control register (TIMx_ECR)(x = 2 to 5) . . . . . . . 1289
28/2083
TIMx control register 1 (TIMx_CR1)(x = 2 to 5) . . . . . . . . . . . . . . . . . 1260
TIMx control register 2 (TIMx_CR2)(x = 2 to 5) . . . . . . . . . . . . . . . . . 1261
TIMx slave mode control register (TIMx_SMCR)(x = 2 to 5) . . . . . . . 1263
TIMx DMA/Interrupt enable register (TIMx_DIER)(x = 2 to 5) . . . . . . 1267
TIMx status register (TIMx_SR)(x = 2 to 5) . . . . . . . . . . . . . . . . . . . . 1268
TIMx event generation register (TIMx_EGR)(x = 2 to 5) . . . . . . . . . . 1270
TIMx capture/compare mode register 1 [alternate]
(TIMx_CCMR1)(x = 2 to 5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1271
TIMx capture/compare mode register 1 [alternate]
(TIMx_CCMR1)(x = 2 to 5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1273
TIMx capture/compare mode register 2 [alternate]
(TIMx_CCMR2)(x = 2 to 5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1275
(TIMx_CCMR2)(x = 2 to 5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1276
RM0440 Rev 1
RM0440