ST STM32G4 Series Reference Manual page 1675

RM0440
Bits 31:24 ADD[7:0]: Address of the LPUART node
ADD[7:4]:
These bits give the address of the LPUART node or a character code to be recognized.
They are used to wake up the MCU with 7-bit address mark detection in multiprocessor
communication during Mute mode or Stop mode. The MSB of the character sent by the transmitter
should be equal to 1. They can also be used for character detection during normal reception, Mute
mode inactive (for example, end of block detection in ModBus protocol). In this case, the whole
received character (8-bit) is compared to the ADD[7:0] value and CMF flag is set on match.
These bits can only be written when reception is disabled (RE = 0) or the LPUART is disabled
(UE=0)
ADD[3:0]:
These bits give the address of the LPUART node or a character code to be recognized.
They are used for wakeup with address mark detection in multiprocessor communication during
Mute mode or low-power mode.
These bits can only be written when reception is disabled (RE = 0) or the LPUART is disabled
(UE=0)
Bits 23:20 Reserved, must be kept at reset value.
Bit 19 MSBFIRST: Most significant bit first
This bit is set and cleared by software.
0: data is transmitted/received with data bit 0 first, following the start bit.
1: data is transmitted/received with the MSB (bit 7/8) first, following the start bit.
This bitfield can only be written when the LPUART is disabled (UE=0).
Bit 18 DATAINV: Binary data inversion
This bit is set and cleared by software.
0: Logical data from the data register are send/received in positive/direct logic. (1=H, 0=L)
1: Logical data from the data register are send/received in negative/inverse logic. (1=L, 0=H). The
parity bit is also inverted.
This bitfield can only be written when the LPUART is disabled (UE=0).
Bit 17 TXINV: TX pin active level inversion
This bit is set and cleared by software.
0: TX pin signal works using the standard logic levels (V
1: TX pin signal values are inverted. ((V
This allows the use of an external inverter on the TX line.
This bitfield can only be written when the LPUART is disabled (UE=0).
Bit 16 RXINV: RX pin active level inversion
This bit is set and cleared by software.
0: RX pin signal works using the standard logic levels (V
1: RX pin signal values are inverted. ((V
This allows the use of an external inverter on the RX line.
This bitfield can only be written when the LPUART is disabled (UE=0).
Bit 15 SWAP: Swap TX/RX pins
This bit is set and cleared by software.
0: TX/RX pins are used as defined in standard pinout
1: The TX and RX pins functions are swapped. This allows to work in the case of a cross-wired
connection to another UART.
This bitfield can only be written when the LPUART is disabled (UE=0).
Bit 14 Reserved, must be kept at reset value.
Low-power universal asynchronous receiver transmitter (LPUART)
DD
DD
RM0440 Rev 1
=1/idle, Gnd=0/mark)
DD
=0/mark, Gnd=1/idle).
=1/idle, Gnd=0/mark)
DD
=0/mark, Gnd=1/idle).
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