Table of Contents
Advertisement
www.ti.com
No.
Reset
M3 Core
Source
Reset
1
POR reset
Yes
2
XRS input
Yes
WDT0
3
Yes
reset
WDT1
4
Yes
reset
5
MNMIWD
Yes
M3
software
6
reset /
Yes
debugger
reset
C28
software
RSn from
7
No
M3(CRESC
NF[M3RSnI
N])
8
TRST
No
C28
Debugger
9
No
Reset
(SYSRS)
CNMIWD
10
No
Reset
11
ACIB Reset
No
As shown in
Table
reset, the entire device is reset, including control and analog subsystems. Software on the master
subsystem can choose to reset the control subsystem and analog subsystem by writing a "1" to M3RsnIN
(bit 16) and bit ACIBRESET (bit 17) of the CRESCNF register.
Also note that whenever the ACIB reset is activated, the analog subsystem is reset. Whenever the analog
subsystem is reset, the ACIB is also reset and vice-versa. On power-up or after every master subsystem
reset, the analog subsystem is held in reset. This also means that ACIB is held in reset.
After a reset, the reset cause register (RESC) is updated with the reset cause. The bits in the reset cause
register are sticky and maintain their state across multiple resets except when a Power-on Reset (POR) is
the reset cause, in which case all the bits in the RESC register are cleared. For the master subsystem on
this device, this register is called the MRESC register.
After any reset that resets the master core, boot ROM code on the master subsystem will run, which
brings the control system and ACIB out of reset and starts the application software as per the boot mode
configured. Please refer to the Boot ROM chapter for more details.
Table 1-4
provides information for the device bring up time-line on power-up.
SPRUH22I – April 2012 – Revised November 2019
Submit Documentation Feedback
Table 1-3. Device Level Reset Sources
C28 Core
JTAG /
Master
Reset
Debug
subsystem
Logic
Reset
Yes
Yes
Yes
Yes
Yes
No
Yes
No
Yes
No
Yes
No
Yes
No
No
Yes
Yes
No
Yes
No
No
No
1-3, because the Cortex-M3 core belongs to the master subsystem, whenever it is
Copyright © 2012–2019, Texas Instruments Incorporated
Control
Analog
subsystem
subsystem
Reset
Reset
Reset
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
Yes
No
No
No
No
No
Yes
No
No
Yes
No
No
No
Yes
Reset Control
Flash
IOs
XRSn
Pump
output
Yes
HiZ
Yes
Yes
HiZ
---
No
HiZ
Yes
No
HiZ
Yes
No
HiZ
Yes
No
HiZ
No
C28 GPIOs
No
in input
No
state
No
No
No
C28 GPIOs
No
in input
No
state
C28 GPIOs
No
in input
No
state
Analog IOs
No
in GPIO
No
input state
System Control and Interrupts
83
Advertisement
Chapters
Table of Contents
