Cisco MGX 8850 Command Reference Manual page 701

Chapter 9 Troubleshooting Commands
clock source is the internal oscillator in either the free running mode or the hold-over mode: in this case,
the software omits this final validation attempt because no other clocks sources within a clock hierarchy
are available.
Revertive Behavior
For information on revertive behavior, see the cnfclksrc description.
Cards on Which This Command Runs
PXM45
Syntax
dspclksrcs
Related Commands
cnfclksrc, delclksrc, dspclkalms
Attributes
Log: no log
Example
Display the clocks. The display shows that both the primary and secondary clocks are good. They are
sourced at lines 2 and 3 of the AXSM in slot 6. Also, the primary source is providing the active clock,
and the system is configured for revertive behavior. The primary and secondary clock reasons are okay.
pinnacle.7.PXM.a> dspclksrcs
Primary clock type:
Primary clock source:
Primary clock status: good
Primary clock reason:
Secondary clock type:
Secondary clock source: 6.3
Secondary clock status:
Secondary clock reason:
Active clock:
source switchover mode: revertive
Display information about the clock sources. This example shows a BITS clock for the primary source
with revertive mode enabled.
pop20one.7.PXM.a > dspclksrcs
Primary clock type:
Primary clock source:
Primary clock status:
Primary clock reason:
Secondary clock type:
Secondary clock source: 9:1.1:1
Secondary clock status:
Secondary clock reason:
Active clock:
source switchover mode: revertive
Release 2.0, Part Number 78-10467-04 Rev C0, October 2001
State: active, standby Privilege: ANYUSER
generic
6.2
okay
generic
good
okay
primary
bits t1
7.35
ok
okay
generic
ok
okay
primary
Cisco MGX 8850 Routing Switch Command Reference
dspclksrcs
9-83