Cisco MGX 8850 Command Reference Manual page 112

dspclksrcs
Display information on the clock sources. The display shows that nothing has been configured, so the
internal oscillator generates the primary and secondary clocks. The primary and secondary clock reason
is "okay" in each case.
Unknown.7.PXM.a > dspclksrcs
Primary clock type:
Primary clock source:
Primary clock status:
Primary clock reason:
Secondary clock type:
Secondary clock source: 0.0
Secondary clock status:
Secondary clock reason:
Active clock:
source switchover mode: non-revertive
Display information about the clock sources. This example shows a BITS clock for the primary source
with revertive mode enabled.
pop20one.7.PXM.a > dspclksrcs
Primary clock type:
Primary clock source:
Primary clock status:
Primary clock reason:
Secondary clock type:
Secondary clock source: 9:1.1:1
Secondary clock status:
Secondary clock reason:
Active clock:
source switchover mode: revertive
Cisco MGX 8850 Routing Switch Command Reference
2-54
null
0.0
not configured
okay
null
not configured
okay
internal clock
bits t1
7.35
ok
okay
generic
ok
okay
primary
Chapter 2 Shelf Management Commands
Release 2.0, Part Number 78-10467-04 Rev C0, October 2001