Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1403

Hide thumbs Also See for ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3:
Table of Contents

Advertisement

FADD/FADDP/FIADD—Add (Continued)
.
SRC
Notes:
Fmeans finite-real number.
Lmeans integer.
*indicates floating-point invalid-arithmetic-operand (#IA) exception.
Operation
IF instruction is FIADD
THEN
DEST  DEST + ConvertExtendedReal(SRC);
ELSE (* source operand is real number *)
DEST  DEST + SRC;
FI;
IF instruction = FADDP
THEN
PopRegisterStack;
FI;
FPU Flags Affected
C1
C0, C2, C3
Additional Itanium System Environment Exceptions
Itanium Reg Faults Disabled FP Register Fault if PSR.dfl is 1, NaT Register Consumption
Itanium Mem FaultsVHPT Data Fault, Nested TLB Fault, Data TLB Fault, Alternate Data
Volume 4: Base IA-32 Instruction Reference
 F
-•
- 
- 
- 
 F or  I
- 
 F
 0
- 
DEST
- 
+0
DEST
- 
 F or  0
+For +I
+ 
+ 
*
NaN
NaN
NaN
Set to 0 if stack underflow occurred.
Indicates rounding direction if the inexact-result exception (#P) is
generated: 0 = not roundup; 1 = roundup.
Undefined.
Abort.
TLB Fault, Data Page Not Present Fault, Data NaT Page Consumption
Abort, Data Key Miss Fault, Data Key Permission Fault, Data Access
Rights Fault, Data Access Bit Fault, Data Dirty Bit Fault
DEST
 0
+0
+F
- 
- 
- 
 F or  0
SRC
SRC
 0
 0
DEST
 0
+0
DEST
SRC
SRC
+F
+ 
+ 
+ 
NaN
NaN
NaN
+ 
NaN
*
NaN
+ 
NaN
+ 
NaN
+ 
NaN
+ 
NaN
+ 
NaN
NaN
NaN
4:101

Advertisement

Table of Contents
loading

This manual is also suitable for:

Itanium architecture 2.3

Table of Contents