Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1545

JMP—Jump
Opcode
EB cb
E9 cw
E9 cd
FF /4
FF /4
EA cd
EA cp
FF /5
FF /5
Description
Transfers program control to a different point in the instruction stream without
recording return information. The destination (target) operand specifies the address of
the instruction being jumped to. This operand can be an immediate value, a
general-purpose register, or a memory location.
• Near jump – A jump to an instruction within the current code segment (the
segment currently pointed to by the CS register), sometimes referred to as an
intrasegment call.
• Far jump – A jump to an instruction located in a different segment than the current
code segment, sometimes referred to as an intersegment call.
• Task switch – A jump to an instruction located in a different task. (This is a form of
a far jump.) Results in an IA-32_Intercept(Gate) in Itanium System
Environment.
A task switch can only be executed in protected mode (see Chapter 6 in the Intel
Architecture Software Developer's Manual, Volume 3 for information on task switching
with the JMP instruction).
When executing a near jump, the processor jumps to the address (within the current
code segment) that is specified with the target operand. The target operand specifies
either an absolute address (that is an offset from the base of the code segment) or a
relative offset (a signed offset relative to the current value of the instruction pointer in
the EIP register). An absolute address is specified directly in a register or indirectly in a
memory location (r/m16 or r/m32 operand form). A relative offset (rel8, rel16, or
rel32) is generally specified as a label in assembly code, but at the machine code level,
it is encoded as a signed, 8-bit or 32-bit immediate value, which is added to the value
in the EIP register (that is, to the instruction following the JMP instruction). The
operand-size attribute determines the size of the target operand (16 or 32 bits) for
absolute addresses. Absolute addresses are loaded directly into the EIP register. When
a relative offset is specified, it is added to the value of the EIP register. If the
operand-size attribute is 16, the upper two bytes of the EIP register are cleared to 0s,
resulting in a maximum instruction pointer size of 16 bits. The CS register is not
changed on near jumps.
Volume 4: Base IA-32 Instruction Reference
Instruction Description
JMP rel8 Jump near, relative address
JMP rel16 Jump near, relative address
JMP rel32 Jump near, relative address
JMP r/m16 Jump near, indirect address
JMP r/m32 Jump near, indirect address
JMP ptr16:16 Jump far, absolute address
JMP ptr16:32 Jump far, absolute address
JMP m16:16 Jump far, indirect address
JMP m16:32 Jump far, indirect address
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