Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 980
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Operation:
if (PR[qp]) {
fp_check_target_register(f
if (tmp_isrcode = fp_reg_disabled(f
disabled_fp_register_fault(tmp_isrcode, 0);
if (fp_is_natval(FR[f
FR[f
} else {
FR[f
if (neg_sign_form) {
} else if (sign_form) {
} else {
}
}
fp_update_psr(f
}
None
FP Exceptions:
Illegal Operation fault
Interruptions:
Volume 3: Instruction Reference
);
1
]) || fp_is_natval(FR[f
2
] = NATVAL;
1
].significand = FR[f
1
FR[f
].exponent = FR[f
1
FR[f
].sign = !FR[f
].sign;
1
2
FR[f
].exponent = FR[f
1
FR[f
].sign = FR[f
].sign;
1
2
FR[f
].exponent = FR[f
1
FR[f
].sign = FR[f
].sign;
1
2
);
1
, f
, f
, 0))
1
2
3
])) {
3
].significand;
3
].exponent;
3
].exponent;
3
// sign_exp_form
].exponent;
2
Disabled Floating-point Register fault
fmerge
3:81
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