Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1482

FSTSW/FNSTSW—Store Status Word
Opcode
9B DD /7
9B DF E0
DD /7
DF E0
Description
Stores the current value of the FPU status word in the destination location. The
destination operand can be either a two-byte memory location or the AX register. The
FSTSW instruction checks for and handles pending unmasked floating-point exceptions
before storing the status word; the FNSTSW instruction does not.
The FNSTSW AX form of the instruction is used primarily in conditional branching (for
instance, after an FPU comparison instruction or an FPREM, FPREM1, or FXAM
instruction), where the direction of the branch depends on the state of the FPU
condition code flags. This instruction can also be used to invoke exception handlers (by
examining the exception flags) in environments that do not use interrupts. When the
FNSTSW AX instruction is executed, the AX register is updated before the processor
executes any further instructions. The status stored in the AX register is thus
guaranteed to be from the completion of the prior FPU instruction.
Operation
DEST  FPUStatusWord;
FPU Flags Affected
The C0, C1, C2, and C3 are undefined.
Floating-point Exceptions
None.
Additional Itanium System Environment Exceptions
Itanium Reg Faults Disabled FP Register Fault if PSR.dfl is 1.
Itanium Mem FaultsVHPT Data Fault, Nested TLB Fault, Data TLB Fault, Alternate Data
4:180
Instruction Description
FSTSW m2byte Store FPU status word at m2byte after checking for pending
unmasked floating-point exceptions.
FSTSW AX Store FPU status word in AX register after checking for pending
unmasked floating-point exceptions.
FNSTSW m2byte Store FPU status word at m2byte without checking for pending
unmasked floating-point exceptions.
FNSTSW AX Store FPU status word in AX register without checking for
pending unmasked floating-point exceptions.
TLB Fault, Data Page Not Present Fault, Data NaT Page Consumption
Abort, Data Key Miss Fault, Data Key Permission Fault, Data Access
Rights Fault, Data Access Bit Fault, Data Dirty Bit Fault
Volume 4: Base IA-32 Instruction Reference