Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1626

PUSHA/PUSHAD—Push All General-Purpose Registers (Continued)
Flags Affected
None.
Additional Itanium System Environment Exceptions
Itanium Reg Faults NaT Register Consumption Abort.
Itanium Mem FaultsVHPT Data Fault, Nested TLB Fault, Data TLB Fault, Alternate Data
Protected Mode Exceptions
#SS(0)
#PF(fault-code)
Real Address Mode Exceptions
#GP
Virtual 8086 Mode Exceptions
#GP(0)
#PF(fault-code)
4:324
TLB Fault, Data Page Not Present Fault, Data NaT Page Consumption
Abort, Data Key Miss Fault, Data Key Permission Fault, Data Access
Rights Fault, Data Access Bit Fault, Data Dirty Bit Fault
If the starting or ending stack address is outside the stack segment
limit.
If a page fault occurs.
If the ESP or SP register contains 7, 9, 11, 13, or 15.
If the ESP or SP register contains 7, 9, 11, 13, or 15.
If a page fault occurs.
Volume 4: Base IA-32 Instruction Reference