Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1597

MOVZX—Move with Zero-Extend
Opcode
0F B6 / r
0F B6 / r
0F B7 / r
Description
Copies the contents of the source operand (register or memory location) to the
destination operand (register) and sign extends the value to 16 or 32 bits. The size of
the converted value depends on the operand-size attribute.
Copies the contents of the source operand (register or memory location) to the
destination operand (register) and zero extends the value to 16 or 32 bits. The size of
the converted value depends on the operand-size attribute.
Operation
DEST  ZeroExtend(SRC);
Flags Affected
None.
Additional Itanium System Environment Exceptions
Itanium Reg Faults NaT Register Consumption Abort.
Itanium Mem FaultsVHPT Data Fault, Nested TLB Fault, Data TLB Fault, Alternate Data
Protected Mode Exceptions
#GP(0)
#SS(0)
#PF(fault-code)
#AC(0)
Real Address Mode Exceptions
#GP
#SS
Volume 4: Base IA-32 Instruction Reference
Instruction
MOVZX r16,r/m8
MOVZX r32,r/m8
MOVZX r32,r/m16
TLB Fault, Data Page Not Present Fault, Data NaT Page Consumption
Abort, Data Key Miss Fault, Data Key Permission Fault, Data Access
Rights Fault, Data Access Bit Fault, Data Dirty Bit Fault
If a memory operand effective address is outside the CS, DS, ES, FS,
or GS segment limit.
If the DS, ES, FS, or GS register contains a null segment selector.
If a memory operand effective address is outside the SS segment
limit.
If a page fault occurs.
If alignment checking is enabled and an unaligned memory
reference is made while the current privilege level is 3.
If a memory operand effective address is outside the CS, DS, ES, FS,
or GS segment limit.
If a memory operand effective address is outside the SS segment
limit.
Description
Move byte to word with zero-extension
Move byte to doubleword, zero-extension
Move word to doubleword, zero-extension
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