Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1818

LDMXCSR: Load SSE Control/Status
Opcode
0F,AE,/2
Operation: MXCSR = m32;
The MXCSR control/status register is used to enable masked/unmasked exception
Description:
handling, to set rounding modes, to set flush-to-zero mode, and to view exception
status flags. The following figure shows the format and encoding of the fields in MXCSR.
Reserved
31-16
0
Bits 5-0 indicate whether an SSE numerical exception has been detected. They are
"sticky" flags, and can be cleared by using the LDMXCSR instruction to write zeroes to
these fields. If a LDMXCSR instruction clears a mask bit and sets the corresponding
exception flag bit, an exception will not be immediately generated. The exception will
occur only upon the next SSE instruction to cause this type of exception. The Intel SSE
architecture uses only one exception flag for each exception. There is no provision for
individual exception reporting within a packed data type. In situations where multiple
identical exceptions occur within the same instruction, the associated exception flag is
updated and indicates that at least one of these conditions happened. These flags are
cleared upon reset.
Bits 12-7 configure numerical exception masking; an exception type is masked if the
corresponding bit is set and it is unmasked if the bit is clear. These enables are set upon
reset, meaning that all numerical exceptions are masked.
Bits 14-13 encode the rounding-control, which provides for the common
round-to-nearest mode, as well as directed rounding and true chop. Rounding control
affects the arithmetic instructions and certain conversion instructions. The encoding for
RC is as follows:
Rounding Mode
Round to nearest (even)
Round down (to minus infinity)
Round up (toward positive infinity)
Round toward zero (truncate)
The rounding-control is set to round to nearest upon reset.
4:516
Instruction
LDMXCSR m32
FZ RC RC PM UM
15
RC Field
00B
01B
10B
11B
Description
Load SSE control/status word from m32.
OM ZM DM IM Rsvd
10
Description
Rounded result is the closest to the infinitely
precise result. If two values are equally
close, the result is the even value (that is,
the one with the least-significant bit of zero).
Rounded result is close to but no greater
than the infinitely precise result
Rounded result is close to but no less than
the infinitely precise result.
Rounded result is close to but no greater in
absolute value than the infinitely precise
result.
Volume 4: IA-32 SSE Instruction Reference
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