Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1532

INVLPG—Invalidate TLB Entry
Opcode
0F 01/7
Description
Invalidates (flushes) the translation lookaside buffer (TLB) entry specified with the
source operand. The source operand is a memory address. The processor determines
the page that contains that address and flushes the TLB entry for that page.
The INVLPG instruction is a privileged instruction. When the processor is running in
protected mode, the CPL of a program or procedure must be 0 to execute this
instruction. This instruction is also implementation-dependent; its function may be
implemented differently on future Intel architecture processors.
The INVLPG instruction normally flushes the TLB entry only for the specified page;
however, in some cases, it flushes the entire TLB.
Operation
IF Itanium System Environment THEN IA-32_Intercept(INST,INVLPG);
Flush(RelevantTLBEntries);
Continue (* Continue execution);
Flags Affected
None.
Additional Itanium System Environment Exceptions
IA-32_Intercept
Protected Mode Exceptions
#GP(0)
#UD
Real Address Mode Exceptions
None.
Virtual 8086 Mode Exceptions
#GP(0)
Intel Architecture Compatibility
This instruction is not supported on Intel architecture processors earlier than the
Intel486 processor.
4:230
Instruction Description
INVLPG m Invalidate TLB Entry for page that contains m
Mandatory Instruction Intercept
If the current privilege level is not 0.
Operand is a register.
The INVLPG instruction cannot be executed at the virtual 8086
mode.
Volume 4: Base IA-32 Instruction Reference