Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1490

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FTST—TEST
Opcode
D9 E4
Description
Compares the value in the ST(0) register with 0.0 and sets the condition code flags C0,
C2, and C3 in the FPU status word according to the results (see table below).
Condition
ST(0) > 0.0
ST(0) < 0.0)
ST(0) = 0.0
Unordered
This instruction performs an "unordered comparison." An unordered comparison also
checks the class of the numbers being compared (see
page
4:193). If the value in register ST(0) is a NaN or is in an undefined format, the
condition flags are set to "unordered.")
The sign of zero is ignored, so that -0.0 = +0.0.
Operation
CASE (relation of operands) OF
Not comparable: C3, C2, C0  111;
ST(0) > 0.0:
ST(0) < 0.0:
ST(0) = 0.0:
ESAC;
FPU Flags Affected
C1
C0, C2, C3
Floating-point Exceptions
#IS
#IA
#D
Additional Itanium System Environment Exceptions
Itanium Reg Faults Disabled FP Register Fault if PSR.dfl is 1, NaT Register Consumption
Protected Mode Exceptions
#NM
4:188
Instruction
Description
FTST
Compare ST(0) with 0.0.
C3
C2
C0
0
0
0
0
0
1
1
0
0
1
1
1
C3, C2, C0  000;
C3, C2, C0  001;
C3, C2, C0  100;
Set to 0 if stack underflow occurred; otherwise, cleared to 0.
See above table.
Stack underflow occurred.
One or both operands are NaN values or have unsupported formats.
One or both operands are denormal values.
Abort.
EM or TS in CR0 is set.
"FXAM—Examine" on
Volume 4: Base IA-32 Instruction Reference

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